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Recent content by sweeety

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    LVS error:ddwnps(diode)

    Hello everyone, I faced an error in my lvs, its says unstable ddwnsps . As far as I see all the vdd and gnd connections are ok. Anyone faced this kind of error?? if so please share the solution . Many thanks in advance.
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    plot magnitude of gm Vs Vgs using phase in matlab

    hi everyone.. need some help to plot magnitude of gm Vs Vgs Firstly a table data was extracted from the plot(magnitude and phase) using pss analysis where Vgs is sweeped for a range.Then i imported the data in matlab. Their i was strucked..could any one please tell me how to plot gm(both +ve...
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    CMOS CG LNA with cross coupling technique

    hello... thank u...but iam not still completely getting it..in the schematic..the input ie., rf signal is feed through source...but by cross coupling we r feeding the ac signal from one source to another gate. If the resistor is not placed..the signal which is fed from source goes to gnd...
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    Regarding CMOS LNA Design at 5.2GHz in ADS

    hello somulu...here u go!!! check the attached file.. hopefully this will help u a bit to learn basics...good luck...
  5. S

    CMOS CG LNA with cross coupling technique

    Hey pavel !! I attached the file...thts the basic schematic which i started with...sorry for late reply though... thank you...
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    What does infinite dc gain exactly mean in the case of ideal integrator?

    Ideal integrator ie., ideal opamp...In ideal state u always have a infinite output impedance ...thts the main reason for infinite gain...
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    CMOS CG LNA with cross coupling technique

    why should we bias gate via resistor when we r using cross coupling technique?? thank u...
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    where can i found umc 90nm cmos processing parameters?

    umc 90nm please can any one tell me where can i found umc 90nm cmos processing parameters?? ....thank u

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