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Recent content by swapna2009

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    Clearance error in Eagle

    Hi keith, I designed my whole circuit finally...:). and I did auto route it, I am getting many dimension errors. I could not figure out what it is. Here I have attached both schematic and board files of that circuit. Can you please check it once and let me know the solution. Keith , I have...
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    Clearance error in Eagle

    Hello Keith, Can you please help me out with my new problem. I have created a component-2pin header in eagle library. which you can find in the follwing link Digi-Key - 277-1273-ND (Manufacturer - 1725656) I want to use them for battery clips, I don't know where is the problem. those are...
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    Clearance error in Eagle

    Hello Keith, Really many many thanks for that expalantion. It is really clear, I got it this time. Now I am uisng (1*2+15*16) layer setp. now I am not using blind vias. with the original via only I could connect it to inner layers. I am not using netclasses. again I came up with another...
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    Clearance error in Eagle

    Hi Keith, Here I will explain my problem clearly, In my circuit I have two power supplies let's assume +VCC and -VCC and I need to use them in many places of my circuit, so for that purpose I thought I will dedicate +VCC to one layer (layer 2) and -VCC to another layer (layer 15). I am...
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    Clearance error in Eagle

    Yes keith, i need to use blind vias between layers 1 and 2 and 1 and 15. if i define layer setup as (1+2*15+16). where should i define blind vias. Thanks, -Swapna. ---------- Post added at 21:35 ---------- Previous post was at 21:29 ---------- keith, may I know the reason why the layer...
  6. S

    Clearance error in Eagle

    Keith, Can you please send me any tutorial to better understand the vias and layer setup.... Thank you very much for all your help.
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    Clearance error in Eagle

    Keith, If i build 4-layer setup as (1+2*15+16). It is not allowing me to make vias from 1 to 2 and from 1 to15 layers, it is only allowing me to make a via between 1 and 16 layers.
  8. S

    Clearance error in Eagle

    Keith, Actually this is just a sub circuit of my whole complicated circuit, so for that circuit I need to have 4-layer board, I want to dedicate 2 layers for +VCC and -VCC. I cannot just use 2-layer board. First I want to be successful with this simple circuit after that I am planning to design...
  9. S

    Clearance error in Eagle

    Sorry Keith, attched board file now
  10. S

    Clearance error in Eagle

    Thanks keith, I could figure it out where the problem is. Now there is no more clearance error in my design. But... I come with new problem... that is regarding traces. even auto route is not able to trace some of the traces, even when I try to trace them manually still that original trace...
  11. S

    Clearance error in Eagle

    Thnaks Keith, I have attached Analog devices.lbr file... As i remember i did not edit the library. Thanks -Swapna.
  12. S

    Clearance error in Eagle

    Thanks Keith for your reply Here I am attaching schematic and borad files.. Thanks -Swapna
  13. S

    Clearance error in Eagle

    I am getting Clearance error when I use SMD components? how to remove that error? Thanks for any help.... -Swapna
  14. S

    unsual results when I increase the length of CPW in IE3D

    i guess problem is not with port definition, r u sure about impedance matching? i mean correct dimensions of cpw?
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    unsual results when I increase the length of CPW in IE3D

    hello naresh, i have updated that file with CPW ports, just run it once , and let me know whether u get desired results or not. good luck bye.

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