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While it's possible to generate write-ready and read-ready signals asynchronously, it's really not very useful, since the only way those signals can be used for decision-making is if they're synchronized. If a write-ready signal is generated asynchronously and then synchronized, one will be...
How much time and effort should one spend writing "magic words"?
I've changed the design since posting the original question, so I'm now using serial flash rather than EEPROM. The same general issue still applies, though the serial flash only needs a few microseconds to write a byte. It would...
If you need to control seven signals from one, and they don't need to change very fast, I would suggest using something similar to the coding method used by radio control servos. The communication line idles high for a minimum of something like 10ms between frames. Then for each object to be...
Re: comunication between master and slave devices using RS-4
It's pretty common to send binary data, with certain values "escaped", and then give each transmission a header that starts with the "escaped" character. For example, one could use a character code 10 followed by 21 to represent...
USB generally requires specialized hardware (built into some controllers, but not most) and generally requires the host side implementation to be pretty complex. Suitable for communication between pluggable and interchangeable devices, but not optimal for cases where both ends of the connection...
I'm trying to rework an application which used a type of Serial NOR flash which is getting difficult to find (it had small erase blocks, buffers to copy from one page to another, etc.) and would like the new design to be as adaptable as possible to different chips. In case of unexpected power...
If the output of one register changes on the same clock edge as the input to another register is sampled, it is imperative that change on the first register not have time to reach the second before the clock gets there. Signals other than clocks can generally arrive at different destinations at...
It's important to ensure that data is not sampled on or near clock edges where it might change. If two domains have clocks that are "almost" perfectly in sync, you should have data leaving each domain change on the opposite clock edge from where it will be sampled in the other. To minimize...
There are many types of joysticks. Some return a voltage or resistance, some simply have switches for up/down/left/right, and some have an on-board processor which exchanges serial data. The data formats for some systems are readily available; for other systems, they are unavailable without...
None of those choices matches the circuit behavior. Since you've shown your work, I would say that from a static perspective I agree with it. The circuit appears to compute A*B, without regard for C, when the inputs are steady. If A is high and B goes from low to high, the output edge may not...
I don't think you can do anything about FF1. On the other hand, I would think timing violations would be EXPECTED on the first stage of a synchronizer. As for the second stage, perhaps you could wire its async-reset to the output of the first stage. That way the async reset going into the...
If the fast clock is consistently much faster than the slow clock, about having the slow clock domain produce a handshake signal which toggles every clock, and having the fast clock domain update those signals which feed the slow clock domain whenever it sees that the handshake has changed...
When using a serial EEPROM, under what circumstances may EEPROM page-writes be assumed to be atomic (e.g. if a system disruption occurs around the time of a page write, either the entire write will succeed, or no data will be disturbed) and what safeguards are required to ensure that they will...
The biggest issue there is that it may be difficult to maintain an accurate count if something disrupts your ability to cleanly count interrupts. For example, if a watchdog timeout occurs, it may be hard to avoid having your clock disrupted.
One way to deal with this would be to have the clock...
A serial RAM can write data as fast as it can be clocked in, and each byte may be written an unlimited number of times without "wearing out"; it will only retain its contents, however, as long as power is applied. Some designs combine a serial RAM with a battery.
An EEPROM will take about 5ms...
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