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Recent content by Subhash

  1. S

    How to remove the DRC error highlights

    Closing the Assura and restarting the run should help. In Assura ELW also you can try turning off these markers.
  2. S

    Setting Calibre RUN PATH variable

    Hi, Kindly request help to set the Calibre run path for all the users in a project I would like to set the run path as a project specific variable, so that when a user opens the Calibre Gui the run path should be automatically loaded. Regards, Subhash
  3. S

    How does Well proximity effect (WPE) affect threshold voltage of the device?

    Hope these links are useful: https://www.edaboard.com/threads/well-proximity-effect.124548/post-542916
  4. S

    LUP.2g DRC in tsmc 65nm technology

    I understand these LUP.2g errors are at core cells and not IO. - Adding Ptype guardings surrounding the effected NMOS in core area - otherway could be adding guardRings (Ptype-Ntype-Ptype) for IO (For IOs because those are the injectors). this will eventually clear your LUP errors at core. Its a...
  5. S

    Technology node and wavelength relation for double patterning

    Please find the link of the videos about Double Patterning: Part 1: https://youtu.be/d5uoklMx63I Part 2: https://youtu.be/YDnIYmQ_Ll4 I will try to get you the "EXACT" meaning for Technology node, though my understanding in my words might not explain it correct.
  6. S

    Technology node and wavelength relation for double patterning

    Hope this will be of your help: https://www.techdesignforums.com/practice/guides/double-patterning/
  7. S

    [SOLVED] Skill code to test a metal's path resistor

    Hi SpringWeng, Please check below corrections made for your code, 1. cvId=getEditRep(winId) -> cvId=geGetEditRep(winId) # function geGetEditRep was missing prefix of "ge" 2. pathObj=setof(x selObj x~>objType=="Path") -> pathObj=setof(x selObj x~>objType=="path") #Alphabet P was...
  8. S

    resistor layout problem in LVS part

    I would guess below of these may be a reason, 1. In the Hercules lvs run, Lib name from where the "TEST" cellView is being called. 2. Also please check your cds.lib whether the techLib is attached to the library or the techLib is present in the cds.lib 3. We can also try by doing...
  9. S

    SKILL file for Path and bus creation

    skillfile Thank you very much Erik. Hey the discussion u mentioned talks about changing the layer in leHiCreatePath and about changing the layer using replay files. it was very informative but unfortunately I couldnt get much help for my goal. If u find any other info please do let us know...
  10. S

    SKILL file for Path and bus creation

    virtuoso skill draw path Hi Guys, Need your help. I want to draw the Bus (metal paths) in Virtuoso Layout editor. It takes more time for creation of a path and copy paste adjusting etc... etc... Hence I am trying to write a code for creation of bus, for that i need to understand how the...
  11. S

    Looking for information about PowerFET layouts

    Can any one please let me know where we can get information about PowerFET layouts.
  12. S

    eZdsp LF2407A flash unable to be clear

    ezdsp lf2407a Hi... I am having a eZdsp LF2407A board from Spectrumdigital. Now I want to test the board by giving external Input and connecting the output to CRO. But the problem is I am not very sure with the I/O pins. Could anyone please tell me which pin should be used as Input and which...
  13. S

    Looking for materials about DSP processors programming

    Re: Dsp prosessors Hav u tried www.dspguide.com or else u can log on to www.ti.com and search for the document. Subhash

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