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This is not related to my question, my question is related to the calculation of the feedback network. Whether to use the capacitance of the capacitors close to the switcher or to use the combined capacitance of all the capacitors connected to the power network, even those far away on the board.
I'm calculating a compensation network for power supplies based on the LM20323MH from TI.
https://www.ti.com/lit/ds/symlink/lm20323.pdf
I have slight doubts about correct estimation of output capacitance to use in the calculation. The board is a cpu motherboard (i.mx6q quad core, 1.4 Ghz) so...
Greetings.
The intent is not to measure the base station emission. But the emission of cell phones and 3G dongles and other transmitters which usually broadcast to a base station. The 35dBi is a number given for the prototype antenna which is actually off ebay so it may very well be way off...
Thank you for your response. In my case though shifting the dynamic range upwards is alright since this is a near sensing gadget (in the same house/building as the transmitter). I don't mind not being able to pick up very weak signals.
Greetings.
I'm making a signal strength gauge for 3G transmitters (3G dongles and phones). I have a 35dBi directional 1990---2170 Mhz Yagi antenna and most transmitters seem to be transmitting max 36dBm. I have located a few rf signal strength ICs but very few of them measure as high as 36 dBm...
Greetings.
I'm looking for discussion on the disadvantages of weak microcontroller internal pullups (100k) on professional pcb's. What comes into mind is lesser susceptibility against EMI transients then with stronger external pullups (4.7-10k), but with digitally filtered inputs with time...
Our experience has been that maintaining a solid ground plane results in fewer EMC problems then utilizing split ground planes. It was done in the past but problems kept creeping up. Proper board segmention into digital and analog parts has provided better results. Not to say that split ground...
The analog circuitry was placed in a corner on the board specifically to avoid digital ground currents. There is a solid ground plane (no split ground) covering the board. It's also nailed down to chassis ground by 2 screws in the vicinity. The analog part has it's own power supplies which are...
Greetings.
I have a 6 layer mixed signal board with the following stackup.
top
ground plane
Mid layer
Mid layer
power plane
bottom
In one corner of the board i have some really sensitive analog circuitry encased within a shield box. I'm wondering how beneficial it is for me to put ground...
Greetings
I'm having a bit of trouble whether deciding on using bob smith terminations or not in a PoE application. Some sources deem the termination useless since they are effectively shorted out by the PoE power architecture but others appear to place them even in PoE applications.
Is there...
I think i just realised how this works. What i failed to see was that all three windings are actually sharing the same core after all. The trick lies in the phase relationship between the inductors. That in addition to the diode on the auxilary winding works such that the voltage on the primary...
The equivelant circuit with only three inductors is what i was originally asking for. I still haven't found out how the three inductor version works in practise in regards to how the transformer is wound in reality nor how to do it in ltspice. At this point all i know i can get the same effect...
Fvm. I have already modeled the interaction between the primary (let's call it L1) and the secondary (L2) by coupling them with a spice directive K1 L1 L2 0.995. However spice wouldn't allow me to then couple only the secondary inductor to the third (the auxilary one which we'll call L4) with...
Greetings.
The issue is regarding the use of the auxilary winding that can be used in flyback smps's to power the ic and increase efficiency. I'm a bit confused by how it's woven into a transformer and how it can be modeled. I do realize it's woven against the secondary winding such that it...
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