Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I have attached my design. My port is on the apper side of the coaxial cable in order to get electric fields on the rest of the design, so i get that error.
Thank you,
Stavri Georgiou
i have already tried that but my port is a circle(the end of the coaxial cable), and when i create the rectangular box i have the intersect error, since the rectangular and the port are touching one to another
Thank you for your reply. The problem is that i am designing a coaxial cable(the port is in the one side of the cable ) and when i set dielectric's material(middle cylinder) as a vacuum it creates this error...when i set it as a coper, it doesnt create it. But vacuum is the right material for...
Hi there,
I am trying to simulate my antenna in HFSS and i am getting this error : Port refinement, process hf3d error: Port 2 is assigned to an internal face. Only allowed with lumped ports
I have read that if you are trying to simulate a port inside a radiation box you have to put a pec cap...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.