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Thank you for reply...
I have the requirement of
1. When open input comes output should go to zero. (Open will come with some failure,otherwise always 2 inputs will be connected)
2. The internal component, (eg. transistor or MOS) which takes input fails in short/open, output should goes to logic...
I am designing a circuit, there I have a requirement, AND gate open input should be considered as logic low and when one of the input is logic low other input shouldn't be passed to output.
Open input will happen because of some failure. Otherwise always two inputs are connected to AND gate.
To...
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