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Recent content by Spectre90

  1. S

    Button increment counter (2-bit) verilog

    Here's what i came up with: module state( input btn, clk, rst, output [1:0]ld ); reg [1:0]count = 0; //gives values from binary 0-3 reg enable = 1; //enable whenever the button is released always@(posedge clk) begin if(rst) count = 0; if(btn)begin if(enable)begin count =...
  2. S

    Button increment counter (2-bit) verilog

    In tried the code you have wrote (not exactly) and It shows all the count Example: when I hold down the button, the outputs (in LEDs) will count binary 0-3 until I release the button. I am trying to get a button to toggle with 00,01,10,11 (in a loop) each time I press it. :/
  3. S

    Button increment counter (2-bit) verilog

    How would you do it in vhdl? I know a bit of both
  4. S

    Button increment counter (2-bit) verilog

    Ok I know this might sound stupid and maybe easy, but I want to make a module in verilog that each time I press button and release once, the output will be either binary: 00,01,10,11,00,01...etc. Basically I want to make count up once each time I press the button. When I attempted to code it, I...
  5. S

    need help with a part of my project

    It's more like 3x4-bit capture register And it counts a binary 1 to 9 (4-bit loop). And it goes to the [11:8],[7:4] and [3:0] input of my 7 seg module. The [15:12] will be fixed values. And yes there will be a reset register ... Or button to start back from the 1st segment slot
  6. S

    need help with a part of my project

    ok this might be confusing but bare with me.... im trying to make 12-bit stop counter where i have one button input that stop each 4-bits slots i'll put in my segment display module whenever i press a button, it stops one segment to display a number and if i press the same button again...
  7. S

    Implementation of Counter in Verilog

    Language: Verilog Board: Xilinx Basys2 Hi I am trying to make a counter that has a reset, clock (board's speed 50MHz), and a manual stop button inputs and outputs are 4-bits for a 7-segment-display. However, i am trying to count from 1 to 9 (of course in a loop) and if i pressed the stop...
  8. S

    [SOLVED] Verilog project idea needed

    Well I can't implement a traffic lights because it was used in the lectures.
  9. S

    [SOLVED] Verilog project idea needed

    Yea you're right it [B]finite[\b] My bad. I need some ideas for a project to do in class and has to be in verilog
  10. S

    [SOLVED] Verilog project idea needed

    Hi I'm new verilog however I need a project idea involving verilog. The project involves Infinite state machine desgin model and cannot be a stop light. I can't think of anything involving state machine so I'm asking you guys to give me some ideas. Please help out Thanks for reading :)...
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