Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
salam ,,,
thanks for concern nand_gates
the clock may be 4 MHz
but I try it on any frequency
does the code do the function we need ?
Added after 38 minutes:
salam,,,
thanks MWind
I'm using ModelSim 6c version
I need more clarication
salam ,,,
this is a VHDL code for generating a 10 sec pulse in for every minute
Entity T2 is
port ( clk : in std_logic ;
T : out std_logic );
end entity ;
architecture behv2 of T2 is
begin
process ( Clk )
variable PCount : Integer :=0 ;
variable SecCount : Integer := 0 ;
variable PC...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
