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Recent content by sniper10

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    netlist with Dxdesigner

    I am having problems building a netlist with nets annotated with the instance names rather than the instance ID. I use the pcb interface generic.cfg to generate the .net and the .pkg files which i pass on to a layout engineer. The .net names look like this...
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    dxdesigner to Pads Layout Net Label

    hello, i need some help for the generation netlist from Dxdesigner to pads layout. i m working with hierarchical flow using different blocks with internal schematic. i have some problem with the net name in schematic : for example, in the block "POWER" i have a net "3V_Enable", when i create the...
  3. S

    special power symbol in pads logic

    hey, i need some help on PadsLogic. i want to add a new power symbol in my schematic with a name VCC_PLF. i made a symbol in my library but i can't add it using "add part" and when i try with the right-click and choosing "alternate" i can't found my symbol. all i get is other power names ?! i...
  4. S

    Pads Layout to Expedition PCB migration

    thanks guys but does anyone have this tool from Mentor ?!!! i can't access to the database !!
  5. S

    Pads Layout to Expedition PCB migration

    hey, i have a PCB file with Pads Layout, and i wanna open it with Expedition PCB. the two tools have the same extension " .pcb " but i can't open the file with Expedition. how can i do this ?! i don't have any translator tools, plz some help !!! thanks a lot
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    VDSL2 POTS/ISDN low pass filter design

    vdsl2 pots Hi, I have a project and I neeed some help. i have to design an integrated low pass filter to separate the POTS/ISDN (0 to 120kHz) from the VDSL2 (138kHz to 30MHz). this project is in order to replace the external splitter for the VDSL2 modem. I need some notes, documents, old design...
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    PCB design with immunity consideration

    thanks. In fact, I try to found somethings with search in google, but the most is talking about EMC as emission and how to trace and reduce the antenne loop and limit crosstalk in order to limit radiation of the borad and I know that is nice but the board have to pass the EMC testing with...
  8. S

    PCB design with immunity consideration

    pcb and immunity Hi, when i start to design the PCB,the first consideration to take is to limit the emmission and radiation effect in the board and do the simulation for checking the result (i'm using hyperlynx ). but for testing the immunity, i have no idea how i can take consideration in the...

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