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Layout problem
Dear Colbhaidh, Thx for your reply.
i would be appriciated if you send these files for my or give me a link for download it. i'm living in a country which has no any access to these technologies but unfortunatly my professor forced me to draw a layout for graduation(MSC). i...
Layout problem
hi dear all friends;
i have designed an ADC in 0.18u(TSMC). Now i must draw its layout with cadence or Ledit but unfortunately i haven't any experience about this issue. in order to design ADC in Hspice, i used of technology file with .lib suffix. Now what kind of library i...
Design procedure
Hi dear all,
i confused with design procedure of opamps that should compensate with compensation capacitor(except load compensation such as folded cascode).
i some opamps similar to "two stage", for designing opamp we must use of some requierments and then start to sizing...
Re: ac analyze
Thanks to all for your replies,
1)this system designed for gain=4000 , one folded cascode topplogy with pmos inputs and out put is single ended.
2)i used of these two sources for ac analysis: Vx x 0 dc 0.5, Vy y 0 dc 0.5 ac 1
(please let me know that how we should select...
ac analyze
Hi everybody,
i used of ac analyze for printing bode plot of opamp, and when i used of ac source for input, gain was 4000 and it was depicted in .Lis file beside bode plot verified that value, but when i apply sin source to input with same dc and very low amplitude(0.1mV), gain is...
s h circuit
Hi dear all friends,
i designed open loop SH circuit for 10bit resolution with Fs=200MHz.i want to measure SNR of this block but i confused. when i export oputput of Hspice to matlab, SNR is so dependent to windows that used for SNR calculation .I would be appreciated if any body...
SNR
Hi dear all friends,
i wanna design track and hold for 13bit ADC, but i don't know how test this T/H and calculate SNR of this block. i would be appreciated if anybody give me Matlab code for finding SNR(via Hspice output that printed in .Lis file).
Thx
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