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Recent content by snehajose

  1. S

    Embedded Linux evaluation board porting

    https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/
  2. S

    gate level modelling of fir filter in verilog

    hi everyone, my seminar uses an FIR filter that has reduced number of multipliers. so my code need to consider the structure. do i need to code it in gate level? the filter coeffficients obtained from matlab is 64 bit. how can i convert it to lower bits or how can i directly use them as signed...
  3. S

    [SOLVED] parallel fir filter coefficient

    Hi, do you know how we are selecting the fir filter coefficients for implementing it [in verilog]?
  4. S

    [SOLVED] [HELP] Parallel FIR Filter Structures

    Hi, I saw your code for fir filter in vhdlguru. H0 <= to_signed(-2,8); why it is declared so?
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