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Recent content by Smillsey

  1. S

    Crossover/Distortion on MUX

    hey brian thanks for the suggestion... i am not super knopwledgable on these swithces. there is no DC offset... although the next stage in the circuit is actually a DC offset stage preparing the signal for the ADC driver... so if i cant eliminate it with a load resistor i could put this switch...
  2. S

    Crossover/Distortion on MUX

    Hi all! I have a deisgn in which i have multiple signals entering a DG1208 mux. https://www.analog.com/media/en/technical-documentation/data-sheets/DG1208-DG1209.pdf I am using ada4807 op amps both before (to provide gain) and after (as a buffer) the DG1208. At the output of the DG1208 pin 8...
  3. S

    Internal Stripline

    ok, i will liaise with the pcb house thanks 1684508750 just clarify one thing for me... if a signal is single ended and will have return currents... will it be fine as long as i have a continuous unbroken ground plane on one side of the signal layer and on my "power plane" layer i do not run...
  4. S

    Internal Stripline

    Hi FvM, thanks for the reply, i see.... but why does it matter about thickness of centre dielectic and dielectric between other layers. It will still be symmetrical...
  5. S

    Internal Stripline

    Hi all! I am at the stage of manufacturing a pcb and in discussion witht he pcb fabricator regarding stackup (which they are trying to change, as usual!) I have a 6 layer pcb, I have used layers as follows; L1 : SIG L2 : GND L3 POWER PLANES L4 SIG L5 : GND L6 : SIG I set my stackup so that...
  6. S

    USB-C layout (using USB2.0)

    Sure, here is the solution https://electronics.stackexchange.com/questions/610007/how-to-wire-usb-c-connector I am yet to have my pcb manufactured... but i am confident it will be ok
  7. S

    USB-C layout (using USB2.0)

    Hi all! I am laying out a project and using a USBC connector (as they are small) but only actually using USB2.0... Anyway, my main question is how best to route the D+ and D- traces as the connector i am using makes it difficult to route D+ and D- to the 4 pins on the connector.... I am using...
  8. S

    ±1V differential, ±50V common mode

    Sure I will post up the finals schematic I’ll have a trimmed differential front end to bring the common mode within the limits of the ADA4817, then a differential amplifier stage. The ADA4817 datasheet is pretty good at giving guidance on keeping the loop stable so should be ok there. I’m...
  9. S

    ±1V differential, ±50V common mode

    I should have been clearer thanks for your advice I got there in the end - 1641586928 Sadly the common mode is a large AC signal, it can be anything from uHz to 7MHz (although won’t be 48V at 7MHz)
  10. S

    ±1V differential, ±50V common mode

    Not sure if I am misunderstanding what you are saying here :-) But the attenuator is not 1MOhm at 7MHz, it becomes a capacitive divider
  11. S

    ±1V differential, ±50V common mode

    Not sure what you mean, you can increase input capacitance across the 1MOhm chain and then have compensation caps with a trim pot at the front end. All diff probes are designed like that
  12. S

    ±1V differential, ±50V common mode

    Thanks for the response. Yes at the moment I am thinking option 3, I have managed to get the circuit simulating correctly now. 1641547628 I think I will create my own 1Mohm attenuators right at the front end (instead of the LT5400-8 in my first sketch) to drop the common mode to below 4.5V...
  13. S

    ±1V differential, ±50V common mode

    It’s a good point but I cannot isolate this part of the circuit as the data rate is too high and the digital side of the system is already designed - the FPGA-ADC-GAIN stages are not isolated. I think I will have to work on getting the differential circuit working properly… I think a modified...
  14. S

    ±1V differential, ±50V common mode

    Hey Klaus Yes there are transducers but they don't have anywhere near the range of frequency i need - I need to differentially measure a 1Hzx~7MHz signal across a 10mOhm resistor Signal Voltage : Up to 1Vpk/pk across the 10mOhm resistor (coaxial shunt in this case) (100Apk, but only 10Arms...
  15. S

    ±1V differential, ±50V common mode

    Hi all I am somewhat going round in circles here... I need to design a differential measurement circuit to measure the voltage drop across a coaxial shunt which will have a frequency range of up to 10MHz. Voltage across the shunt will be +/1V max (at lower frequency) The common mode can be...
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