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voltage limiting circuit
Hi,
I want to find a circuit structure to realize voltage limiting purpose.
It works in power-line communication. Sometimes the input signal amplitude after amplification is too large, which will make the modualor overloaded. So I want to limit
the amplified...
Hi. guys,
I want to design a third-order delta-sigma adc and I want to try MASH(multi-stage noise shaping) structure with 2-1 cascade. The behavioral model is shown below.
I have question about the noise cancellation logic. How do I realize the gain block
"1/c1" and "b1-1" . I think the two...
Re: How can I deal with 3rd HD in a 2nd SigmaDelta Modulator
If you used a latched comparator as the 1-bit quantizer, I do suggest you add a pre-amplifier before the comparator. It will improve the non-linear gain of the quantizer, which may be the firsr cause of the third harmonic.
Thank you for your attention, yibinhsieh
I can ensure that there is no stability problem with the folded-cascode OP , but I have doubt with the stability with CMFB loop. However, I am not quite sure about how to verify the stability of the CMFB loop. I have two more questions:
1. The kind of...
ops for cmfb
Hi, everyone,
I designed a folded-cascode fully differential opamp, and the structure of the CMFB is two differential pairs, which is shown in the picture.
After simulation , I found that this OPAMP works well in the continous-time configuration, like a Multiple-feedback...
Hi, let me get my question more clear.
Hspice in windows OS can print all the DC states of transistors at the specified time point by using the command '.OP'
But Hspice embedded in cadence environment (Analog Design Environment) seems not to support to perform this function. So we can do...
hspice output
Hello, everyone,
I have a question . As we know , hspice output file can give us lots of useful information about the circuit behaviour. For example, we can know the MOS transistor is in saturation region, or linear ,or cut-off. And we know every transistor's Gm, Gds, Ids, Vth...
Hi, sankude, I have tried the first FFT method you mentioned on Cadence. However ,I met a new question. I don't know what the meaning of time portion and the sampling point number. When I increase the sampling point number, I got a larger frequency range. While I set up different portion of...
Hi, renwl,
Thanks for your attention.
what kind of data do i export from HSPICE, I only got output data in terms of transient waveforms and netlist .
can you explain it more explicitly. cheers!
Hello, everyone,
can anyone tell me how to perform FFT (fast fourier transform) analysis with HSPICE integrated in Cadence analog artist development environment. Is there any special option within this tool ? I only find four analysis options : DC ,AC, Noise and Transient .
I want to check the...
hehe, yes, I also focus on the correct function of the filter.
And I have downloaded your .sp file, and can you make sure that it can perform AC analysis of SC filter ? Because I always only do trans simulation , which consumed me too much time. If so , I will try your way to analysis my...
Hi,
I am also working on designing a bandpass SC filter, so I have read the chapter you mentioned in ALLEN's book. You should note that Allen also mentioned that this example's magnitude is affected by sin(x)/x, which leads to the passband gain is not satisfied and it needs prewarping...
Re: OPamp design!!
Hi, saad ,
to be honest, I think this structure is not so good .
There are three simple current mirrors. Vds mismatch leads to DC offset, and current mirror introduce mirror poles and zeros which affect the frequency response of the OPAMP.
I admit that the biasing...
Re: OPamp design!!
this is a single stage opamp.
Gain = gm1* ro6//r07;
GB= gm1* CL ;
Pay attention to those current mirrors, they have bad effects on DC offset and bandwidth .
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