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I am using iverilog to do design and simulation in OS X for my verilog class.
I am wondering if there is any tool in OS X that can convert verilog into schematic? I know in windows, there is software like Vivado or Quartus that can do such things.
Macbook is so portable. It will be nice if I...
Thank you very much again, dick_freebird,
I will go check it.
By the way, do you think it may be the problem of license? I am not sure whether our Cadence can do verilog-A simulation.
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Thank you, I do find the problem in the cmd window that tells me that the verilog-a is...
Thank you, dick_freebird,
I will have a try~
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It seems there is still no current....
I change the schematic into this:
And plot the current of the resistor, still zero...
This is really tough to set up...
Dear All,
I am learning how to use verilog-A to do simulation. I create a resistor by verilog-a:
the code is:
`include "constants.vams"
`include "disciplines.vams"...
Hi everyone,
I am writing a skill file to generate a Pcell
In the command window I type: load ("/home/guhao/IC51_NCSU/g_test/a.il") in the command window (a.il is my skill file)
but receive the following error:
*Error* range: argument #1 should be a number (type template = "n") - nil...
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