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Hi all,
I am using TSMC65 (CNM65GP). I converted a design from CDB to OA using CDB to OA translator GUI provided by cadence.
virtuoso version is 6.1.3.
In the translated layout, I see the drawn paths/recs are shifted for some reason. It might be due to different scaling factors for the MOS...
Hi,
The problem is resolved. Previously I used the metal definition which was incorrect in the cmrf8sf.lvs.cal file.
#DEFINE 8LM_3T //LM Option (5thin-3thick) (M1-M5,MQ,MG,LM) //previously tried this (incorrect)
When I use the correct one it works fine.
#DEFINE 8LM_2T_3RF //MA...
Hi,
I am new to the configuration of Calibre. How do I configure the resistance or capacitance recognition layer? Which file should I look for or is it done through the gui? Any help on this is appreciated. During the run, I am pointing to the
cmrf8sf_8LM_323_detailed.xrc.cal file.
The files...
Hi all,
I am encountering the following error when I run extraction using Calibre v2011.3_29.20.
Error while compiling rules file /nfs/guille/ams/senbird/IBM13/IBM_PDK/cmrf8sf/V1.8.0.4DM/Calibre/xRC/cmrf8sf_8LM_323_detailed.xrc.cal:
Error PEX5 on line 232257 of...
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