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Recent content by sigui777

  1. sigui777

    What are the methods for laying out differential pair/node in high speed application?

    Re: differntial pair Diff. inputs of pair should be close to each other so that noise becomes common to both lines and then rejected since common mode is rejected in diff. pairs.
  2. sigui777

    which book is better for beginner

    Both are good books. I recommend start reading microelectronic circuits from Sedra and Smith, 4th edition. This will give you a solid foundation. Another good book is the one from Gray and Meyer "Analysis and Design of Analog Integrated Circuits".
  3. sigui777

    Need info about 0.25um CMOS process

    Re: 0.25um CMOS process This link might help you. https://www.mosis.com/products/fab/vendors/tsmc/tsmc025/ There is a description of .25 process. There is also a link to some spice parameters.
  4. sigui777

    methods to decrease low frequency gain

    If you are trying to kill the gain at dc increase your bandwidth or your unity gain frequency. If you are using an internal compensation cap you can move it to a higher frequency.
  5. sigui777

    Can I use the minimum size of a transistor?

    When using minimum size trasistors is always important how much current it will take. Not only DC but also spikes of current usually cause by parasitic inductances due to long metal routes ect. These spikes can hurt your circuit in the long run is it is to narrow.
  6. sigui777

    Multifinger Transistor

    ryusgnal The width of each finger will basically depend of what is the maximum current density for each contact in your process. I don't have access to the your process data but there should be a spec with the maximum Idc for each contact. Depending on this parameter you determine the amount of...
  7. sigui777

    10 pF capacitor layout

    The size of the capacitor will depend of voltage you're gonna put in it. If is low voltage you can use a snwell for you cap but if it is high voltage you probably need to use poly to metal and will consume much more area.
  8. sigui777

    The PSRR and CMRR definitions

    define power supply rejection? By definition Power Supply Rejection Ratio is the ability of an amplifier to maintain its output voltage as its power-supply voltage is varied. I understand that psrr is the "the ratio of the change of output and the change of the power supply" like you said...
  9. sigui777

    The body diode effect can be simulated in spice?

    If you are worring about turning on the parasitic on the NMOS used a guard ring around it and tie it to the higher supply you have. Recommended reference "The Art of Analog Layout" by Alan Hasting.
  10. sigui777

    Multifinger Transistor

    I agree with the equation that krashkealoha gave. The minimum width will depend on the process and on the application you are workin on Using multifinger transistors will help you match devices better. By using multifinger you will be able to used layout techniques as interdigitation or cross...
  11. sigui777

    BioPotential Amplifier

    As in many other fields the Operational Amplifier is a very useful block. As salmiakki said the instrumentation amplifier is widely used since it has a great CMRR, which means that cancels out most of the common mode noise. Also the high input impedance of the instrumentation amplifier make it...

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