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I know a little bit assembly.now, I have try to learn high tech c pic. I am wondering , is there any command in pic c such that logical shift in assembly. And is there anybody to give all commands or to suggest any website to learn codes?
I am writing c++ code and output of the code comes as a matrix. I wonder can I visualize this matrix and save as a image by using c++? My matrix elements only 1 or zero. As a result of this I want to obtain picture compose of black and white squares. Is it possible to write code to create such a...
Re: timing constraints
again I want to ask something.. for example I have input named " data " . If I can apply time constraints to data , is there any possibility that my data can not affect my output? what I mean is that does the wrong working part(s) continue ?
in my project , I am using different clock domains . (50 , 88 , 100 MHz) during the implementation , at router step I have had error related to timing constraints. I didnt understand why.. Then after my internet search , I found something TIG. But I didnt understand explicitly what does it...
I used dcm for clock frequency multiplexing. moreover under dcm I found BUFGMUX to select suitable clock. But at this point I face with problem that is test bench didnt work. problem is that clock at the output of BUFGMUX is U . I didnt find where I am wrong. no syntesizing error but test...
I have project that using vga port of fpga , image is seen on screen. Also I want to change its resolution but frame of image is constant. as a results of this I have to use different clocks for corresponding resolution. How I am going to change clocks while changing resolution?
hi. in my project I have to use different clock for different inputs on one signal.
for example ,
signal clk_main : std_logic ;
clk_main <= clk_1 when input= '1' else clk_2 ;
when I tested clock is working on workbench. but on fpga it doesnot work.
Also I used dcm property of pfga to...
Re: help for fpga
thanks for all helps. I understand clearly:)
I know little bit verilog from my univercity but in my internship , I am responsible to learn and apply on fpga with vhdl... But I have been using fpga for two weeks and I think it is funny and easy... my fpga is spartan 3 AN...
Re: help for fpga
when I synthesize the code it does not give any error. As a result of this I decide that this representation and assignment are correct.
I am new in Fpga. I am studing vhdl. I saw code like that
type CHAR_RAM_TYPE is array(0 to 39) of std_logic_vector(7 downto 0);
signal charRAM : CHAR_RAM_TYPE := ( 0=>x"41", 1=>x"6E", 2=>x"64", 3=>x"79", 4=>x"FE", 5=>x"47", 20=>x"31", 21=>x"34", 22=>x"2F", 23=>x"30", 24=>x"36", 25=>x"2F"...
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