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when rtos is developed
Q. Develop and emulate RTOS in x86?
A. Yes (if you loosen yourself with word RealTimeOS i.e. not following the definition strictly)
It can be started with with writing a scheduler. It can be binary when you start then make it for 'n'.
A very good example can be uCosII...
rcm3720 project
great sharing...
great concept...
i have started this coz now every embedded product are going network enabled.
So i want to learn this from scratch.
I am total dumb in networking...
still i am very optimistic that i ll complete this along with my official work.
this is my...
hi
i want to network-enable my device .
So i need to set up a web server.
what things i would require...
should i go with writing code of TCIP from srctch, take some OS and port it to some processor
what else i need to do. TELNET, SNMP ...
please guide.
lpc fpga
hi friends
I want to implement LPC on FPGA
i want to know what things i should concentrate on. I have little knowledge of LPC. I want to implement it so that i can learn in depth of voice encoding (vocoders).
I have implemented FIR filters on FPGA.
As for different voices the...
Re: explain semaphore
then whats the difference between semaphore and flag . all things using semaphore can b done using flag.
Is flag is implemented in RTOS or OS as semaphore with some clearcut rules ( as given by its inventer ) of using it and features OS provides.?
shreshtha
barrel shifter vhdl or verilog
hi
simple code for barrel shifter is given in VHDL primer J. Bhaskar book but it is in VHDL . I think its logic can easily be converted to Verilog code
bye
fpga dcm
i have read the data sheet but still i dont know how to instantiate the DCM
please tell the "code"
can it be used for multiplication and division both?
what's the advantage of using it instead of creation our own clk divider ...
is it ised for multirate system and their...
Can a variable be used as an index of an array while synthesizing memories RAM or ROM and other subtypes;
for example
--code
"variable0 (var1 downto var2 );"
where var1 and var 2 are integer subtype
and variable0 is std_logic_vector ( some_constant downto 0)
while synthesis error comes is...
hi
if u r working in this field and have experience with boards of Xilinx ... then please suggest me which board should i go for if my work is based on implementation of small real time speech processing systems.what should i consider most when buying the kit (as for mobile we see the memory-to...
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