Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hmm, i have covered some distance but still stuck at a point. I have VGG value, VDS equation (including ID) which is VDS = 12 - 1220*ID, and VGS equation (including ID) which is VGS = 3.44 - 220*ID but still don't know what do with all those parameters. This is my circuit by the way ...
Thanks a lot for the tips. Anyways, i assume you mean this by transfer admittance
SYMBOL---PARAMETER------------CONDITIONS-----------------MIN.TYP.
Yfs--------transfer admittance----ID = 300 mA; VDS = 25 V-----200 600
aren't the conditions too high? Don't know how these work tho, even if i...
Hello there, I gotta bias a basic circuit with NMOS transistor. But while doing it and finding Id, i need W/L value in the equation, so i am stuck. All i have is this datasheet : http://www.datasheetcatalog.org/datasheet/philips/BS108_3.pdf
I have searched a lot tho but still nothing. (I know...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.