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Hi all,
I have this problem, when i want to print to a post script file, Layout L prints file but i get not whole view of my layout.
I use this printer:
Hewlett-Packard DesignJet 5000PS (Postscript): \
:manufacturer=Hewlett-Packard: \
:type=postscript2: \
:maximumPages#30: \...
hi dani,
You might refer to **broken link removed** starting from page 16-9, there is described a digital clock made from few counters, could give you a start. Hope this helps!
Good luck, Shlapenka.
hi reneezl,
no it is not neccessary. It is a good idea to add a n-type guard ring for PMOS transistors, this way they will be protected from horizontal currents, that may interfere with their work. Double guard ring is double protection, you surround n-type guard ring with a p-type guard ring...
Parasitic caps
Hi everyone,
When i wan to do layout extraction with parasitic caps i am having a problem.
I go to Verify>Extract... Then i choose Set Switches and in there suposed to be Extract_parasitic_caps selection, but there is no such thing! Only MergePinAndNet (provided a image below)...
Hello everyone,
I am having this problem, connecting bulk connections to substrate. When its PMOS i have no problem, i make a Ntap in the same nwell as the PMOS is and connect it to VDD. When it comes to NMOS, i cant figure it out... I put a NMOS transistor, near it i put a Ptap and connect...
Re: cadence installation
im afraid there is no cadense on windows platform, only linux. In fact im using vmware with centOS5 linux, on wich my cadence is running. You can get vmware, make a virtual machine there and according to instructions proivided above install your cadence :)
Re: resnsppoly problem
here is what i found in spectre model:
**************************************************************************
* Non-Salicided P Poly Resistor
**************************************************************************
inline subckt gpdk090_resnsppoly (PLUS MINUS B)...
Re: resnsppoly problem
here is the info form specification:
Spectre Netlist
Spectre Model Name = “gpdk090_resnspoly”
R1 (B MINUS PLUS) resnsppoly_pcell1 segL=8u segW=1.5u
Subckt resnsppoly_pcell1 B MINUS PLUS
Parameters segL=8u segW=1.5u
R0 (PLUS MINUS B) gpdk090_resnsppoly l=segL w=segW
Ends...
Re: Incomplete net
yes everything is as u said here is the pic:
**broken link removed**
it is a picture of generated connections.
Added after 35 minutes:
Solved my problem! Looks like it wa problem with my ntap's. I had created them myself and it seems something was wrong with them, even...
Re: Incomplete net
it is conned to In1 pin, it is that big rectangle in top. That pin was generated from schematic as was generated all other pins and devices..
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