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Recent content by shirin_br

  1. S

    About psrr of bandgap based on amplifier

    Place an AC source on Vdd with amp=1V and Freq=1Hz. IF using Cadence, run the AC analysis for simulation and plot 20dBVF(/vout) using calculator and remember to plot in logarimitic scale. Added after 20 minutes: sorry, dB20VF(/vout)
  2. S

    How to simulate NBTI of a circuit?

    Hello all, Does someone know how to simulate NBTI of a circuit? Thanks.
  3. S

    How to perform NBTI measurement in Cadence?

    Hi everyone, I have a bandgap circuit running and I have been asked to estimate NBTI. I know what it means literally but can anyone help me with some hints how to measure it with Cadence? Is it something like a statistical analysis? Thanks.
  4. S

    who can give me some thesis about LDO

    You can download the LDO book (PhD thesis of Rincon_Mora) here You can also find somemore papers about LDO in EDA Theory part. Success.
  5. S

    How to simulate a huge mixed signal circuit?

    It's also faster with Ultrasim simulator in Spectre. It's less accurate but much faster.
  6. S

    what is the meaning of ESR of Cout in a LDO? thanks

    esr means ESR means Electrical Series Resistance of the load capacitor at LDO's output. Typically LDOs need the load capacitors to have low ESR. To have more insight to ESR effect on LDO performance you might want to read the LDO book written by Rincon Mora (download from this link) ESR...
  7. S

    calibration bit for output current

    Hi, I am designing a bandgap which besides a reference voltage should provide biasing current for different blocks. The problem is the output current needs to be calibrated by calibration bits, accuracy is -20% to 20%. Could someone give some hints how and where to add the bits, in order to...
  8. S

    Beginner:Problem in Adding Instance in virtuoso Cadence.Help

    Re: Beginner:Problem in Adding Instance in virtuoso Cadence. To add an instance use the tool bar, (shortkey = i) and find the pmos in yout technology file. You can change the properties right away when you add the instance or afterwards, choose the "properties" (shortkey = q). To modify the...
  9. S

    Questions and problems about LDO design

    Re: LDO question You can download it from.
  10. S

    What is dropout voltage?

    lTo: iuyonggen_1 The most useful book is Rinconmora book. You can download it from this link. Success.
  11. S

    SpectreS simulator in Cadence

    spectres simulation Hello, Does anyone know how to do statistical simulation in SpectreS simulator of Cadence?? Thanks.
  12. S

    Problem with the SNR caused by a-weighted filter

    Hi, I'm trying to make a model of A-weighting filter in Verilog-AMS to use it after my FIRDAC. The model is based on the transfer function of the A-weighting filter. Supposedly with a-weighting filter the SNR should have been improved which is quite the opposite. I have attached the model...
  13. S

    What is the best architecture for VCO with the tuning range from 600 MHz to 1.2 GHz?

    VCO tuning range If the phase noise performance is critical in your design then LC oscillator is a good choice for this frequency range.
  14. S

    Looking for references about LDO design

    Hi, I should design an LDO to provide 1.8V outof 2.4 ~ 3.6V voltage source, and I need to make all the specifications. Could anyone help to give me some references to read about the design of LDOs, as I have never worked with them? Thank you so much.
  15. S

    Phase Noise Analysis of CMOS VCO

    The fundamental frequency is 2.5 GHz and the oversampling is 4.
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