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snapshot mode sample and hold
I used the first stucture to do the sample and hold.
I found several problems in this citcuit.
1. Vin+ is not equal to Vin- of OTA, and there are thirty mv difference between them.
2. From the output chart, it wastes too long time to start settle and can not...
sample and hold design
I desinged a sample hold circuit for adc.
If I input 1V vpp, I cannot get 1v vpp from output.
But if I input 500mv vpp, I can get correct sampled 500mv vpp from output.
What is the reason caused this problem?
Not enough gain or not enough output swing or others...
Re: Need help in SRAM design
Thanks, I solved that porblem.
And, I am still doing the dual port sram, any documents may share with me?
BTW, you r in Australia?
I have studied there for a couple of years
Need help in SRAM design
I got a worng function in my sram.
I explain that: first, I stored the data in address A
second, I changed server address and stored serveral other data.
finally, I can not get the correct data in address A.
Any timing sheme...
Re: Help in T&H circuit
CM switch should turn off first then sample switch turn off and then hold switch on. that can reduce the charge injection and clock feedthrough
How much time betteen that?
or How to deside it?
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