Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
hi,
I am writing ethernet driver for smc91c111 lan controller for Gumstix board with PXA270 processor.
Problem is I am not able configure any of the registers. From linux I am writing value but when I readback I am getting only FFFF.
The GPIO pin of pxa is acting as Chip select for lan...
bus bridge verification
how to verify clock domain crossing ??
I have implemented a bus bridge using handshake mechanism.
can anybody tell tell me what are the methods to verify it.
If you are building the SCV files then you can change the settings of your compiler.
In case visual studio you can change the settings in project options as I mentioned above.
Re: ESL and Verification
Dear ajayj,
I appreciate your optimism.
C to RTL has to undergo lot of refinement. It will take some time adapt to this new flow.
But I strongly believe that for Control path design these tools are not useful. For data path its ok. The simulation speed is also very...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.