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Recent content by sharathpatil

  1. S

    Assura QRC (GUI) error with UMC technology

    Hi, I am trying to do parasitic extraction of a cell which has a P-plus resistor using Assura QRC (GUI). The technology being used is UMC CIS. I get the following error when I run QRC: ERROR (AVPXV-10017): In spice cell tc909ba_chopperbgr_clkmodule, inst |I1/|I6/avD29_1 of device...
  2. S

    Transition times in CMOS Clock buffer

    Thanks a lot dick_freebird. That helps!
  3. S

    Modelling OTA non linearities

    Hi, The transistor level specifications would depend on the OTA architecture you are using. But, in general OTA is similar to any TA; TA amplifies single-ended signals whereas the difference of two signals will be amplified in an OTA. * The gain of OTA is still Gm*Ro * slew rate is...
  4. S

    Transition times in CMOS Clock buffer

    Hi, I am trying to design a simple clock buffer to operate at 300 MHz. What is the normal transition time requirement for the clock signal so that the devices are sized appropriately? Thanks, Sharath
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