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Recent content by shaokang_w

  1. S

    different transistor length

    since you don't do layout ,i have been confused by"extracting the length of the transistor(using l('mos_name')),"can you tell it more?
  2. S

    Doubt with system stability

    Doubt on stability zero in RHP will degrades PM ,zero in LHP may be not .
  3. S

    doublets and its effect?

    IEEE PAPER "Relationship between frequency response and and Settling Time of Opertional Amplifiers" will tell you what and how
  4. S

    In Spectre, how to simulation slew rate and noise

    for fully differential OTA,i don't use unit gain buffer configuration i use closed unit gain configuration for fully differential OTA ,and 2 reverse step signals to see the slew rate and settling time,output can minus each others
  5. S

    Opamp common mode voltages for ADC

    you can put 2 outputs to vdd/2 by TG in half of clock
  6. S

    What is the future for CMOS Analog IC Designers ?

    i thank Data Converters and power managment ICs are always useful
  7. S

    how to check the stability of SC CMFB ?

    SC CMFB hi dodoro, can you tell me after use a ideal cmfb ,where i can put the ac source to see PM and GM , since it is now a close loop.
  8. S

    Berkeley EECS140,240,247 Classes

    I can only download .mp3 not .rm from EE240: h**p://webcast.berkeley.edu/course_details.php?seriesid=1906978279
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