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vhdl multi source
I got rid of the errors by using one process and the simulation works perfectly.
Now if i want to use another process that uses the output of the first process does my second process require all those signals (used from process 1) in its sensitivity list? or should 'clk'...
multi-source in unit xilinx error
Thank you for the prompt reply ring0 :)...
You are right...I have one question, when can i have multiple processes? is it only when all the signals being driven in these processes are mutually exclusive/have nothing to do with each other?
In that case, I...
signal **** has a multi source. vhdl error
Hello all,
I am trying to implement the following code:
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL...
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