Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by sarjumaharaj

  1. S

    How to use libraries in XILINX (VHDL)

    I came across this library in vhdl use work.cpu_lib.all; How do i use this library? I typed it out but it didn't recognize it as a key word. I mean for regular libraries and key words the color of the text changes to blue right? But this one didn't. What should I do.
  2. S

    Mips processor datapath error

    Hello, I am trying to implement a single cycle MIPS processor. I've been able to execute the dual level controller but there seems to be some error with the datapath. Can someone please see and tell me what the error is. I used a test output signal called test_pc to check if the value from pc...
  3. S

    Impediance Matching using L network in Transmission Lines

    I was talking about T pi and L matching network ... Anyways I figured this out
  4. S

    Impediance Matching using L network in Transmission Lines

    Design areactive L network in order to provide impedance matching between transmission line of Zo = 300 + j60 and an antenna having impedance of 80 +j100 at the frequency of 1MHz. How do design this circuit? My professor told me that while designing L impedance matching circuit we need to make...
  5. S

    Sign extension problem. Msb doesn't copy properly with a loop.

    Hello, I am making mips processor and I had to make a component which would make 16 bit vector into 32 bit vector. I used a simple for loop to copy the msb of the 16 bit vector to the rest of the 16 bits of the 32 bits vector. (see the code). However the output is so haywire. Sometimes it gives...
  6. S

    Output comes after few clock cycle

    This is a program for shift register. I've used datapath and controller method to design the circuit. I got the output but the output comes after a delay. What could possibly be the error. Here: c0 c1 0 0 HOLD 0 1 SHIFT RIGHT 1 0 SHIFT LEFT 1 1 PARALLEL LOAD sl sr...
  7. S

    Error in recursive program how to deal with it (quick sort)

    This is my code for quick sort. Needless to say it doesn't work. I tried to see the program step by step but got so confused in the recursion part. Can someone tell me what the problem is and also teach me how to analyze a recursive program. How do you find errors in recursive program. The...
  8. S

    Shift and Add multiplier Doesn't give required output

    Here is my code for shift and add multiplier (datapath controller method) Can anyone please see the code and see where I'm going wrong. It just doesn't seem to work. The datapath is like this Datapath. However I've combined A and Q as prodandmulti in the code. because my professor told me that...
  9. S

    [SOLVED] Problem with output (output changes when it is not supposed to)

    does rising_edge mean that the clk isn't at 1 stage but between 0 and 1 ?
  10. S

    [SOLVED] Problem with output (output changes when it is not supposed to)

    nikhilna007 that is only part of the test bench. Complete testbench has that code too . Here is the whole code. LIBRARY ieee; USE ieee.std_logic_1164.ALL; ENTITY tb IS END tb; ARCHITECTURE behavior OF tb IS -- Component Declaration for the Unit Under Test (UUT) COMPONENT...
  11. S

    [SOLVED] Problem with output (output changes when it is not supposed to)

    hey, I'm designing shift and add multiplier using controller datapath method. Here is the design of the circuit Shift And ADD DESIGN. I'm Making the Q from the design. Basically it's a register which stores the multiplier and shifts the value to the right when a value from product is shifted...
  12. S

    Universal shift register (load state and serial data confusion)

    Have a look at the image i have attached. It is an example of universal shift register. It was in one of the sections of parallel in parellel out universal shift register. However, I think that this USR can do serial input as well with it's SR and SL inputs. Can anyone please see and tell me...
  13. S

    How to do well in Engineering (ECE)

    what would you consider better choice: practice or understanding theory? I mean there is always so much to study and i don't find time to do everything.. what do you suggest. Be efficient at reading the whole theory and try practicing or just look at problems and then skim the theory required?
  14. S

    How to do well in Engineering (ECE)

    I've been constantly working for everyday and despite that I'm doing very poorly in my exams. My professors pour us with assignments up till our head burst's and on top of that we have exams all the time. And I can do them and I can do them flawlessly but I need time and that which is so limited...
  15. S

    Controller for booth multiplier syntax problem

    Hello, I am designing the controller for booth multiplier. (more info on will be found : BOOTH MULTIPLIER ). You can see the ASM CHART ON THE LINK. However, i've added a few more states like hold and end to it. But leaving the design aside, can anyone please see what is wrong with the code. It...

Part and Inventory Search

Back
Top