Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Thanks to all for my responding my questions.....i have found the "captab analysis " in the spectre for both transient and dc analysis...which gives the capacitance at every node of given schematic...................But i still need to consult the book that gives the capacitance analysis of...
hi fren...with reference to" how to calculated the capacitance of node on the circuit?" i have attached the circuit(cmos in cadence) too...for easyness. I hope it will be helpful to get the answer. pls check the link for circuit.
https://obrazki.elektroda.pl/45_1294480074.jpg
Currently i am using the Cadence Virtuoso(180nm) and spectre simulator....
i have to calculate the capacitance at the node of circuit where some of sources of MOSFET and drains of other MOSFETs are connected(as i have to calculate the energy comsumption = V*V*C).
So How can i calculate the...
hi .....
most of our frens said that in mtcmos different vth is used but i have one doubt ....i am using cadence virtuoso........ as i want ot use mtcmos concept without using any body biasing to change vth,,,,,,,,so
can we use sizing of mtmcos transistor to vary threshold voltage???
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
