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Recent content by samviva72

  1. S

    Verilog testbench for an 'image processing' task

    Thanks for the advice. I tried to write something as below that will read values from a text file containing hex values and write the output to another text file in decimal format. All the files compiled well in ModelSim. But when I click 'Start Simulation', nothing seems to happen. Can somebody...
  2. S

    Verilog testbench for an 'image processing' task

    I started learning verilog and FPGA a few weeks ago and I have used a verilog script that does a Sobel edge detection by running it on a video stream coming from a camera attached to my development board. The code worked fine as I can see the edges being picked up on the VGA display. I didn't...
  3. S

    Simple array addition in verilog

    Thanks again for the tips. I get the general picture of that what you said but I don't know how to implement this in verilog :( How do I implement those two processing elements P0 and P1? Do I have to create a main.v and call two instantiation of sobel_mine.v? I am not sure how to do that...
  4. S

    Simple array addition in verilog

    Thanks blooz for the code. OK, now I am trying to go a step up by applying a Sobel filter to an image (e.g. 320 x 240 array of 8 bit integer values for now). I have found some code that does the calculation. module sobel_mine( p0, p1, p2, p3, p5, p6, p7, p8, out); input [7:0]...
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    Simple array addition in verilog

    OK, my uni has Altera licence and so I am using Quartus to compile and simulate for now. I had my first try at simulating after spending hours on the tutorial :) Anyway I managed to simulate the code written by blooz and the results are shown in the diagram below. As you can see, the result is...
  6. S

    Simple array addition in verilog

    OK, I understand the parallel nature now. But is there a limit to that 'parallelism'? - Suppose I had two arrays of 2000 values each. Will that calculation depend on the size of the FPGA elements? - Suppose I want to do another calculation on the sum reg after the 'sum of products' operation...
  7. S

    Simple array addition in verilog

    Thanks for the sample code blooz. I have just got hold of a copy of Palnitkar and I am starting my learning process now. Two more quick queries for you: - What verilog compiler/simulator do you suggest to use? The Palnitkar book comes with one on the accompanying CD. Is that good? - In that code...
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    Simple array addition in verilog

    This is my first post and I am about to ask a very very basic question. I have never touched Verilog before nor any other HDLs, but I know C, C++ etc. Can somebody please give me the equivalent of the following C code in Verilog (if such thing exists)? I want to be able to define and populate...
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