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Recent content by sakuragi

  1. S

    Using Voltage Reference to do a wide-swing current mirror?

    Re: Using Voltage Reference to do a wide-swing current mirro This helps me so. But I wonder the purpose of R1 and R2 because N1 and N2 may be pushed into linear region at low Vdd and large current. I think R1 and R2 can force the current between N1 and N2 to be matched more than without them...
  2. S

    Using Voltage Reference to do a wide-swing current mirror?

    wide swing current mirror Hello, I want to design a wide-swing current mirror. So I use this architecture as shown in figure. But with wide-swing, Vg1=Vdd-Vt-Vov, Vg2=(Vdd-Vov)-Vt-Vov, which are all function of Vdd, but Vbg is indepenct of Vdd. So this architecture is wrong. Is there any other...
  3. S

    About the transient simulation

    Now I simulate the start-up function as this figure shows. Bias circuit is a Vt-reference bias circuit. Transistor MS (act like a power down switch) is used to set the initial condition for the p-NMOS current mirror. And Vdd is always high. But I still have a problem. The response still has...
  4. S

    About the transient simulation

    I ramp the power from 0 to Vdd, and do I need set initial condition additionally? If yes, why? Thanks so much.
  5. S

    About the transient simulation

    Hellow, everyone, I am a new guy in this forum. Now I simulate start-up function of a bias circuit (Vt reference) for OP by transient simulation. And I found that the result has relation to the incremental time scale I set. For larger value, the bias circuit "start-up" even though I remove the...

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