Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi All,
Metals are defined in the CMOS process.
Metal1 verticiale
Metal2 horizontal and so forth.
As we move in lower process technology, the rules regarding routing of metal in non defined direction becomes stringent.
for example you in 45nm technology you can route narrow metal in...
1. How do you go about testing a PDK ? is it manually (creating test case for each component bjt, res, inductor and running the simulation) or is there aumated tools available.
2. Does the component results checked againts the foundry data?
3. Do you also check or compare the PDK's developed in...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.