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If I convert "entrada" to Integer then divide it by 10 and then convert it back to std_logic??? because sounds stupid that this device cannot divide per 10...
you mean that maybe I have to transform "entrada" and "deu" to unsigned variable? and also I need more variables to do the division?
Can you write in vhdl what are you suggesting?
Below this text there's a code and I have a problem. I'm trying tod divide a number per 10, because I want to make the table of the numbers just from "0" to "9" but the compilator its saying that I cannot use the operator "/"...and I don't know why...Thanks guys :D
library ieee;
use...
Hello,
This is the code of Square Root from the website -->https://www.cs.umbc.edu/portal/help/VHDL/samples/sqrt8.vhdl
I can't understand it at all so I have some questions...
1.- If its an sqrt8 bits , why is using at the first entity (Sm) only 6 different signals, 4 in and 2 out?
2.-...
Hey, thanks for your fast reply ;)
Well, more or less I can understand what you mean...do you have an example? no all the code but something to start...or some link to learn it how can I start? because I'm a little bit lost...sorry and thanks again!
Hi everybody! I'm new on this world of FPGA's.
Well I'm trying to implement the function Sin and Cos in VHDL but I have a problem because my FPGA's doesn't works with float numbers and I can't use any kind of math libraries. I did a program in C language to calculate Sin() with the Taylor...
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