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Recent content by rivendu

  1. R

    gds layout width and height

    hi, is there any possibility to get the width and height of the layout via a simple command line? it would be perfect to have the possibility to choose the size layer. thanks in advance!
  2. R

    Mask Finishing over SKILL

    Searching tools to build an MPW hi! i am looking for an MPW creator tool. i could find tools like K2 Mask Compose and LayMPW so far. do you know other tools for MPW creating? it would be perfect if it there are free ones, which can be embedded into a SKILL code. thanks in advance! rivendu
  3. R

    question about pmos differential amplifier in a comparator

    thanks for the link. i read this chapter but the techniques they use have too high effort. if i make the difference between the currents of M3 and M2a+M2b as low as possible, then i should have a correct functioning amplifier. another problem is the latch comparator at the output. since the...
  4. R

    question about pmos differential amplifier in a comparator

    hi, regarding to the formula A=sqrt(gm_M1a/gm_M2a) which is the gain of the amplifier, i think that M2a and M2b should be in triode region to have maximum gain, isn't it so? Because i cannot use resistors, i should design M2a, M2b and M3 in such a way to have equal current. Do you know a...
  5. R

    Comparator offset cancellation at which resolution?

    i think it is important to know the offset of the comparator with its input common mode range. when developing a flash adc, the icmr of the comparator is the maximum voltage area to be approximated by the adc. if the area (delta of vrefp and vrefn) should be equal to the icmr of the comparator...
  6. R

    question about pmos differential amplifier in a comparator

    hi, i would like to build a comparator in Output offset storage scheme like depicted below: As the preamplifier, i want to use the differential amplifier with pmos inputs to avoid body effect. I have a problem in dimensioning the amplifier in such a way to have it working between 0V and...
  7. R

    measurinig offset of a latched comparator

    hi for my work it is important to see, whether the comparator can reach an accuracy of 10 bits. Thus, i set the the speed of the ramp signal and the sampling frequency slow enough that the voltage increase within a clock period is not higher than range/(2^10bits). For a range of 900mV for...
  8. R

    measurinig offset of a latched comparator

    hi, yes i simulate with cadence , spectre simulator. do you think it is right?
  9. R

    measurinig offset of a latched comparator

    hi i am investigating offsets of clocked (latched) comparators. my method is to put a ramp signal at the comparator input from 0 to VDD with a slope of VDD/t_ramp. t_ramp is the rise time at the input from a pulse source. the comparator is driven with a sampling frequency of 10MHz. the...
  10. R

    Question about the ICMR of a flash ADC

    hi, i am designing a flash adc and would like to know how to set the difference between vref at the top and the bottom of the resistor ladder. does it only depend on the icmr of the comparator? the goal is to get all comparators switching at the right time. thus, the comparator at the top...
  11. R

    Comparator (opamp type vs latched type)

    hi i would like to know something about the clocking phases in a typical offset-canceled comparator, which consists of: sc-network preamplifier latch switches in razavis book it is mentioned, that such comparators consist of three modes: offset canceling tracking latching but what about...
  12. R

    how can i remove peaks?

    hi, i am simulating an adc for getting the inl and dnl characteristics. at the staircase output, i always see peaks at the starting points of some stairs which affect the dnl and inl data of my script, which calculates these datas by getting the staircase output data. which spectre parameter...
  13. R

    how to accelerate spectre simulation of big circuits

    hi, i want to simulate a 9bit flash adc but spectre needs very much time to simulate it. is there an option to make the simulation faster. for me it is necessary to do the simulation with the conservative method. how about other options like envlp? thanks
  14. R

    creating netlist with oceanscript possible?

    hi i would like to simulate many circuits in a row but it is very time cosuming to start the simulator once to create the netlist and attach a model.scs file. is there a possibility to automate this procedure by an oceanscript? thanks
  15. R

    how to generate stair output of flash adc

    hi, i want to simulate my flash adc with spectre. is there a method to compress the outputs of the adc into one output , which represents the transfer curve. i am apllying a ramp signal into the vinp and vinn inputs of the adc. the reference voltage vrefp-vrefn is 800mV. thanks in advance
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