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Recent content by RiffMaster

  1. R

    Overlap DRC error in Eagle PCB

    I provided above all the necessary information. This is a transmission line footprint, and the issue is that I cannot connect only one side of the TL to the top ground in layout. If I define the line in the schematic with the net signal GND, it will connect all the sides of the TL to the ground...
  2. R

    Overlap DRC error in Eagle PCB

    I just did what you recommend and I get "clearance" error.
  3. R

    Overlap DRC error in Eagle PCB

    Many thanks! Placing vias in auto mode solved the issue. I think this is a bug in the program. Eagle should be smart enough to allow you to put in the right place the vias in manual mode also. I have another question please. The rectangle surrounded by the ground in the attached picture it is...
  4. R

    Overlap DRC error in Eagle PCB

    In Eagle PCB I try using vias to route the signal to bottom layer to avoid "trace overlap" on the top layer (as in the attached picture). But now for some reasons I get overlap error on the vias. I played with many clearance, distance, and size values in DRC settings, but none of them help...
  5. R

    Low phase Noise oscillator design in Microwave frequency range

    At page 5 of the pdf below you can find many rules how to minimize phase noise: https://www.qsl.net/va3iul/Phase%20noise%20in%20Oscillators.pdf
  6. R

    Antenna Simulation tool which includes matching with L R and C components

    For name of good microstrip antenna books check the references books at the bottom of the link: http://www.qsl.net/va3iul/Antenna/Printed_and_Microstrip_Antennas/Design_Ideas_for_Printed_and_Microstrip_Antennas.htm For printed antenna simulation you can try these freeware programs...
  7. R

    Peak to Average Ratio

    What is the peak to average ratio (PAR) in dB of the signals below: - CW (Sine) - FM - GMSK - BPSK - AM 50% - AM 75% - AM 100% - DSB - SSB
  8. R

    Circuit Drawing in Journal And Conference Papers

    This free online tool from Digi-Key make the schematics look like circuits published in electronics magazines: https://www.digikey.com/schemeit#
  9. R

    Help need for designing of microstripline

    https://www.analog.com/static/imported-files/tutorials/MT-094.pdf https://www.qsl.net/va3iul/Microstrip_Stripline_CPW_Design/Microstrip_Stripline_and_CPW_Design.pdf https://www3.alcatel-lucent.com/bstj/vol48-1969/articles/bstj48-5-1421.pdf
  10. R

    Understanding Forbidden zones in Smith chart

    https://www.qsl.net/va3iul/Files/Impedance_Matching_Networks.pdf
  11. R

    [SOLVED] Microstrip design books recommendations

    **broken link removed** https://www.qsl.net/va3iul/Microstrip_Stripline_CPW_Design/Microstrip_Stripline_and_CPW_Design.pdf
  12. R

    Cadence ANALOG DESIGN ENVIRONMENT under Windows

    Even if this is a software/OS question probably here are more people that might know the answer. Does anyone know if there is a future intention of Cadence to make a version of ANALOG DESIGN ENVIRONMENT for Windows? I remember ADS also was stuck for many years under $#@% Unix when finally...
  13. R

    BJT for the lowest phase noise XTAL oscillator

    butler oscillator phase noise Starting from the above information I follow up all the publications that I found about Driscoll (back to sixties), and incredible, seems that he is the father of the true low noise oscillators. All the new authors just copied him, more or less. My respect!
  14. R

    Peak-to-Average - looking only for the numbers

    Re: Peak-to-Average Thanks but you see, the net and a lot of technical books are full of explanations, but most of them are in contradiction. For example I found here some of the answers: https://en.wikipedia.org/wiki/Crest_factor 1. Sine wave PAR is 3.01dB 2. - ? 3. - ? 4. QPSK PAR is...

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