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Recent content by richardyue

  1. R

    What is the best software for VHDL?

    ISE, I think.
  2. R

    Are CLBs and PEs the same??

    I think the CLBs and LEs should be the same in the FPGA. If not, maybe there is problem during our design.
  3. R

    urgent...basics of cmos....

    For the NMOS, the source is always connected to the lower voltage. For the PMOS, the sourse is always connected to the higher voltage.
  4. R

    Which FSM is better for designing in Verilog?

    melay and moore machine implementation Dear Davy, I'm kind of confused about what you said about the "designing data path u can choose mealy as is faster". Would you like to explain it in more detail? Thanks in advance.
  5. R

    Explanation of three types of latencies

    Latency What does latency mean? And what is the relationship between it and throughput in the digital system? What is magma?
  6. R

    What are the differences between CPLD and FPGA?

    cpld vs. fpga The main difference in application between CPLD and FPGA is that FPGA is used for application requiring lots of registers.
  7. R

    Help with interview question #3

    Hi, members, The following is the interview question #3. How to design divide-by-2 and divide-by-3 sequential circuits with 50% duty cycle using VHDL? Thanks in advance.
  8. R

    Help with interview question #2

    Hi, members, The following is the interview question #2. What are the setup and hold time constraints? What do they signify? Which one is critical for estimating maximum clock frequency of a circuit?
  9. R

    Help with interview question #1

    Hi, members, I've some interview questions about digital circuit, VHDL and ASIC/FPGA. I think it's a good opportunity for us to discuss these questions. Maybe it's very helpful when we want to seek for jobs in the near future. The following is the first quesion. Interview question #1: What are...
  10. R

    What does the value of speed grade mean ?

    Hi, members, What does the value of speed grade mean for the Virtex family devices? For example, the speed grade of XC4VLX15 device in the virtex family is -12, -11 or -10, what does -12 mean? How fast is the speed grade? Thanks in advance.
  11. R

    How does synthesis tool know to synchronize with clock?

    clock Would you like to make your problem in a more clear way?
  12. R

    Difference between the Block and Distributed RAMs.

    Hi, members, I want to know the difference between the Block and Distributed RAMs in the FPGA device, such as the Virtex-5 family devices. Thanks in advance.
  13. R

    Control Path and Data Path...........

    The data path is used to perform combinational and sequential circuits. The control unit is a tool which controls how the data path works properly.
  14. R

    Which electronic university course is most practical?

    electronic course Hi, scorpionss22, Where can I find the EPE magzine in 2004 teach series? Thanks in advance.
  15. R

    Difference between the floorplanning and placement

    Aren't cells in the standard cells placed by a standard method since they are called as standard cells?
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