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Recent content by rfeda

  1. R

    inductor dismatch in lvs - help needed

    inductor lvs In the inductor extraction please check if auxiliary layers used for device recognition are being generated and all auxiliary layers are touching the recognition layer. As these layers are used to get the device parameters like inner, outer radius, width, space and turns the...
  2. R

    MOS CV Characteristics

    How do you simulate the CV characteristics of a MOSFET in PSPICE? I am trying to use the .AC and the .DC(.STEP) analysis. When I try to sweep with gate current vs the gate voltage, the gate current remains at zero.Any suggestions....?
  3. R

    Running ASITIC on Fedora Core 3

    Hi all , I am having trouble running ASITIC on Fedora Core 3.0 . Any hints !!!! Seems to be a problem with the dependanices. Thanks, rfEDA

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