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I see, that makes sense actually.
And yea, I'm doing it as a hobby actually, I'm mainly into cyber security, just working in digital/embedded electronics in my spare time.
Thanks everyone for the time you took to reply. :)
Much Regards
Thanks everyone for taking the time to reply.
Unfortunately, the little debate above of VHDL vs Verilog (and others) did confuse me a bit. I wasn't asking which is better or easier, I was asking about how not to embed all my design into one always block sequentially (which is really software...
Hello everyone,
Anyone knows a book or something that can help my brain leave the "software programming" perspective. I can't seem to easily switch to HDL mindset.
I mean, every HDL project I try to code, I end up being intensively criticized for how ugly my HDL code design is, and it's almost...
That was just a quick question that popped up when I found that some chips come with a preloaded bootloaders.
I was just wondering in case I ever needed for some projects to write a bootloader that does some tasks before executing the flash firmware, in that case I think I would either have to...
Thank you Fentrac.
Exactly after your first reply yesterday, I searched a bit and found the datasheet you shared in your second reply.
I quote:
So both the Atmega16u2/32u4 and some others come with a USB Bootloader. But that raises another question, coming with a preconfigured bootloader...
Do Atmega16u2/32u4 chips contain a bootloader to be programmed with USB
Hello everyone,
I wanted to start working on Atmega16u2/32u4 and such chips typically because of the existence of a USB interface (D-/D+/UGND pins).
I'm not talking about working on the chip with the Arduino IDE, I'm going...
Thanks for your intense explaination ads.
What if I wanted to use two sequential statements that depend on each other, and that both are used in an LUT table to get some specific values from it in a synchronous design? That point always gets me confused in HW design.
As an example, in the first...
Thanks for your replies vG and ads.
So usage of tasks/functions within a clock-synchronous design is fine?
I think I repaired the other mistakes and everything now is clear to me. Thanks again!
Hello World,
A while ago, I posted a thread here asking about something in my Simplified DES Encryption Algorithm Verilog design.
Everyone looked at the code said that it was a hardware design written by a software programmer, and that was I using a bad practices in my code.
That was my...
Why is it bad? You didn't provide any further details about the difference between a "good" and a "bad" design, and that's what I'm specifically looking for.
I still can't see why using tasks in a synthesizable code is considered a bad practice? Generally, why using something technically...
Thanks vGoodtimes for your reply.
Is it possible to determine the amount of gates used in a specific portion of my design code?
For example, how can I know if storing S Boxes' values into an array is better than using switch case inside a task? Is it possible to know the number of gates used...
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