Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi all!
I want to build a simple AM receiver in the 30 MHz range. It's for a hobby project so the requirements might seem strange but it needs to have quite good selectivity for nearby disturbing signals.
What would be a good topology to use? I think it would be wise to go for a...
Thank you for your reply.
By mimic, I mean to somehow see an effect similar to what pulling would have on the VCO.
I am not sure exactly how pulling affects the VCO. I guess that one part of it is that when the load isn't matched there will be reflections, and the signal would bounce back and...
Hi!
I'm trying to simulate the transient behaviour of a PLL in ADS, using the in-built PLL behavioural components ("VCO", "PhaseFreqDetCP", etc.).
I would like to simulate load pulling, i.e. how the VCO/PLL will respond when the VCO load changes. Is this possible?
I guess that, since the...
Hi!
You're right, in this case I could've used a noise controller with phase noise analysis and skipped the phase demodulator. It doesn't have any effect on the odd results I'm seeing though. Any idea what's causing the strange results?
Hi all!
I was trying to simulate phase noise getting divided down by a DivideByN component in ADS, expecting to see a reduction by 20*log10(N) (N=2 in this case, so -6 dB). What I actually see though are some very weird results. I'm using a Circuit Envelope simulation engine, with noise...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
