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Recent content by Rapport

  1. R

    How coupons are measured in PCB

    They have explained about their own product. I want to know about TDR measurement and its process
  2. R

    Serial or paraller interface

    I want to know about interfaces we are using in PCB and their type. e.g. USB, PCIe, PCI, SAS, SFP, Ethernet, etc.... and how to find their interface type (serial or paraller).
  3. R

    How coupons are measured in PCB

    We are adding coupon board in a PCB. It is measured through TDR. I want to know about TDR measurement process in detail. i.e how they measure the impedance through TDR.
  4. R

    About Ethernet signals and its interface

    Hi Guys, I am designing a board with RJ45 connector. It consists of only Tx signals. I couldn't see Rx signals in that. Also it is not interfaced with transformer. Is there a ethernet with only Tx signals?
  5. R

    12 layer stackup recommendation

    I would like to design a 12 layer stackup. Please suggest whether below mentioned is good one to follow. Top GND Signal Signal GND Power Power GND Signal Signal GND Bottom When I searched browsed I found the below stackup but it has more than 4 signal layers. I need only 4 signal layers to use...
  6. R

    Expedition PCB report writer error

    In file menu there will be repair database. Try repairing your database and check whether you could able to generate report.
  7. R

    How to get placement files of mentor expedition into allegro?

    Re: mentor expedition I cant understand what you are asking. Tell me clearly what is your need?
  8. R

    How to get placement files of mentor expedition into allegro?

    I have imported IDF file of Mentor Expedition PCB into Allegro. The imported file has only mechanical information like mounting holes, board outline, keepout. I need the placement files also to be imported into Allegro. But it shows warning. How to import the IDF files into Allegro successfully?
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    Design Entry HDL - Global Find

    In version 16.0 also "Global Find" is under Tools--> Global Find. Try once again...
  10. R

    PCB Clearance Suggestion

    Since 3A is much higher current capability, 40mil is not good enough to carry 3A current. Even if you use 2Oz copper, outer layer needs 35mil and inner layer needs 75mil as trace width. Trace width I suggested here is with 10deg max ambient temp rise. It's better to go for plane shapes (with 2Oz...
  11. R

    How to generate pin_value property as report in Concept HDL?

    Hi All, In Concept HDL, I have added pin_value property for schematic symbol pins in Concept HDL schematic. I have to take that pin_value property as report. Can anyone help me how to take that as report?
  12. R

    How to convert EDIF3 to EDIF2 format?

    I need to convert edif2 to edif3 format. Is there any way or translator is available to convert this?
  13. R

    How to Design capture symbols in concept HDL?

    Hi all, I need to import expedition design capture schematic symbols to concept HDL. There is an option to import in concept HDL. File-->Import and export-->Import mentor part. But when I try to import, I dont know what input files need to provide for that. Can anyone help on this?
  14. R

    When core stackup is preferred & when foil stackup is preferred

    At what case core construction stackup is preferred & at what case foil construction stackup is preferred? What is the merits and demerits of using core construction & foil construction stackup?
  15. R

    How to compare the schematic and PCB difference in Expedition PCB

    Expedition has the option to delete the unused part to delete. I need some part need not to get delete in the layout, because I will change those parts with alternative cell. Other than that other components need to get delete. In this case I use "change unused parts to spare" option to remain...

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