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Hi ,
I have an encrypted RTL (encrypted using the synopsys Public key and cadence ncprotect utility.
But when trying to compile the protected file ,I get the following error,
Warning-[USCLA] Unterminated string
Unterminated string found in file 'adder_aec.vp'
at line '9'
for an...
Thanks for your help Klaus,
I do not have the option to test the TLV320 in hardware.
I had a few questions,
what do you mean by non destroying for the analog input voltage?
Also does the max input voltage range of -0.3 to (3.3 +0.3)V indicate that the ADC inputs can vary between -0.3 to 3.6 V...
Thanks for your clarification Klaus!
I am trying to model a simple audio codec(PGA , ADC and DAC) based on the TLV320aic23b specs. I have been looking into
I found it difficult to interpret the input signal values from the datasheet for the PGA(Programmable Gain Amplifier) and the ADC. The...
Hi ,
How does one determine the full scale range for the ADC when it is specified in terms of Vrms?
Can I compute the Full scale peak value as Vrms*2*sqrt(2) ?
Also does this mean that the ADC is single ended? If not, how does one determine the lowest input voltage?
The spec is as given in the...
Hi,
Is there any thumb rule to set the Quantization threshold for generating the bitstream while modeling a first order sigma delta ADC?
I am trying to model a 16 bit SDM ADC with a full scale input of of 1Vrms.
Thanks,
Ranand
Hi ,
Thanks FvM,
So in general the output voltage limiting function can be modeled by a tanh curve.
Since the max output swing is Vomax , the max input swing will be Vimax (i.e .Vomax/Av) ,So by substituting the terms in the BJT transfer characteristic expression ,we get ...
Hi,
I am trying to write a Real number Model for a Programmable Gain amplifier and came across the following expression for limiting the output voltage , can some one please help me understand how this is derived?
Vodif = Vomax*tanh(Av*(INP-INN)/Vomax)
where,
Vodif is the closed loop...
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