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Recent content by ramana

  1. R

    hai....... i am trying code for serial in parallel out .

    i got error at "=" please help me module sipo12(d,c,r,q); input d,c,r; output [2:0]q; reg [2:0]q; always @(negedge c); begin if(r) q=3'b000; else begin q[2]=d; q[1]=q[2]; q[0]=q[1];end end
  2. R

    verilog coding for pipo

    please send verilog code for 4bit parallel in serial out shift register

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