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Recent content by Ramakrishna_444

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    Monte-Carlo Simulations in UMC180...?

    Hi All, Add "* parameters sigma = 3* " in MM180_REG18_V124_MC_STATISTICAL_P.mdl.scs file. The issue has been resolved....
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    Monte-Carlo Simulations in UMC180...?

    Hi All, I'm able to run Monte-Carlo Simulations using gpdk180. I'm doubting that in gpdk model files Process parameters Mismatch parameters are defined. Whereas the same are defined to be Zero by default @UMC180. Kindly let me know how to work it out.
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    Monte-Carlo Simulations in UMC180...?

    Hi all, How to rum Monte-Carlo Simulations in Cadence Virtuoso Analog Design Environment...? I'm using UMC180 Technology on IC616. The model files are been loaded to ADE automatically because of *.il file at schmatic level. I'm able to locate Monte Carlo model fles @...
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    [SOLVED] POLY1 must be covered by N+ or P+ implant layer @Umc40lp using Calibre

    Thanks a lot for your reply dick_freebird. Things are very much cleared me from TLR (Topological Layout Rules) document. Thank you once again for your kind reply.........
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    [SOLVED] POLY1 must be covered by N+ or P+ implant layer @Umc40lp using Calibre

    Hi All, I'm working on Cadence IC616 with UMC40LP technology & using Calibre for DRC. I've encountered following DRC error. POLY1 must be covered by N+ or P+ implant layer Exclude AA_CELL_MARK, HR and MR layers I've turned ON the following switches Since it's a block level Design. DRC...
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    Single-Shot Precision of Time-to-Digital Converter

    Thanks a lot for your reply dick_freebird. I've designed Vernier Delay Line TDC, So Start and Stop signals are there, rather than pulse Input. I'm using vpwl to generate Start and Stop signals. I'm using Fixed Start Signal and varying Stop signal that's how I'm observing Thermometer Codes...
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    Single-Shot Precision of Time-to-Digital Converter

    Thanks a lot for your kind response. My intention is to plot the following plot. Please follow the attachment...
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    Single-Shot Precision of Time-to-Digital Converter

    Hey All, How to measure the Single-Shot Precision of my designed Time-to-Digital Converter..? I'm working on Cadence Virtuoso Design Environment. Thanks in advance.......
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    How to plot the sampling window of the Flipflop..?

    Thanks a lot for your Quick reply FvM.... My intention behind opening this question is... How to find the Setup & Hold time of my designed Flipflop....?
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    How to plot the sampling window of the Flipflop..?

    Hey All, How to plot the sampling window of the Flipflop..? Is this graph mirror image about y-axis for Setup & Hold Time..? (Please follow the attachment) What do I need to understand by the Positive & Negative Data to Clk Offset in the Graph...? Follow the attachments for my concern...
  11. R

    Internal Impedance of sources

    Thanks a lot for your reply..... What’s the exact Internal impedance values of vdc and idc of analogLib in Cadence Virtuoso Design Environment...?
  12. R

    Internal Impedance of sources

    Serfacy, By the same token, The Internal impedance of Current source in Bounded and Convergent System should be THE LARGE possible value. So idc of analogLib in Cadence Virtuoso Design Environment would be....?
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    Internal Impedance of sources

    Serfacy, Thanks a lot for your reply.... BUT In scripting the width of the variable holding data is FINITE. INFINITE means the largest possible thing. For Example the width of the variable holding data is 4. The largest possible number is 9999 (in Decimal Number System)....?
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    Internal Impedance of sources

    Serfacy, Thanks a lot for your reply.... But how would they define INFINITE in scripting......?
  15. R

    Internal Impedance of sources

    What’s the exact Internal impedance values of vdc and idc of analogLib in Cadence Virtuoso Design Environment...? Please do enlighten me in this concern...... Thanks in advance.......
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