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Re: oscillation detector
This is exactly what I need to do but unfortunately I don't have the 2nd clock. There may be other solutions to this problem such as delay lines and flops?!!!
I want to make a digital circuit to detect if a clock is toggling or not. Basically, it outputs a "1" as long as the input is toggling and "0" if not? Sort of like a mono-stable one shot but using digital logic only. I know how to make the circuit to detect the toggling and output a "1" but once...
2- How many bits do you need if you are adding two 8-bit numbers? How many for 3 8-bit numbers or 4 8-bit numbers?
3- When you are verifying a design at what point do you decide that verification is done and the design can be released?
4- What are the different areas of code coverage? list...
Here are a bunch from nVidia ASIC division: If you know the answers, post them.
2- How many bits do you need if you are adding two 8-bit numbers? How many for 3 8-bit numbers or 4 8-bit numbers?
3- When you are verifying a design at what point do you decide that verification is done and the...
Re: interview questions 8051 microcontroller
Here is a new one they ask recently: If you have a long wire running between two flops and you want to buffer it to improve timing where is the best place to put the buffer and why? close to 1st flop? close to 2nd flop? somewhere in between? I don't...
Look on Open cores web site. There is RTL code for an IBM compatible VGA controller on that site. By the way if you are talking about VGA, then on the 9-pin VGA connector there is only 3 color pins not 8. The 3 color pins are analog pins. That means there are no 2^3=8! If you connect the above...
mvj,
I suggest you follow this link to get started. Generally speaking you need to read more than one bokk or paper to do this. You will need cmos layout and rules which you can get from the tool vendor, cmos design principals from any cmos design books. Put the information together yourself and...
True, but if the second stage is set not to use this data (over-sample), and if the input of the 1st stage is keeping the preious value for one more clock cycle, then you can apply the principals of MTBF+Meta-Stability to this circuit and safely assume that the probability of failure in the two...
How about a book on metastability that talks about some of the concerns we raised here? I don't care about handshake, I know how to do handshake, but handshake is not what we are talking about here. The books or papers should be written for those who are learning not an experience engineer with...
lostintranslation; When you say that's nothing new! Can you point to some book or published paper that talks about this?[COLOR="Silver"]
and FVM, the very definition of metastability is based on on the assumption that setup/hold of a flop is violated. It has nothing to do with jitter. I'm not...
FvM, you keep missing the point. The whole idea of the post was a detail discussion of this issue. All you are doing here is to quote some textbook without discussing the issue any further or providing proof or supporting documents to help us understand the relevance of your point of view...
Maybe the schematic did not say specifically, but when you connect the inverted output of the D flop to its input it becomes a toggle flop. Also since each flop output is feeding the successive flop clock input, it makes this circuit a ring counter. As far as how I can tell that it fails as Freq...
Given this circuit, answer these questions;
1- what is it?
2- How does it work?
3- If clock freq. is increased, which flop fails 1st and why?
my guess is: down ring counter, counts from 7 down to zero and repeats, at high freq., the fastest flop meaning F1 fails 1st..... what do you think.
The input to a flop is actually connected as an oscillator with a switch at it's input. To see this, look at the SR flop schema above and if you ignore the SET connection you should see this. As mentioned before if the flop goes metastable, the output of this oscillator could swing to positive...
Why don't you look into JPEG standard. I believe they call it ITU .81 also. In there, DCT is as simple as doing two back to back 8x8 matrix multiplications.
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