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Recent content by raiyani

  1. R

    Suggetions: Want to buy an FPGA

    **broken link removed**
  2. R

    I want to buy a XILINX FPGA Kit and an ALTERA CPLD kit.

    Re: FPGA kit view this website **broken link removed** it will give all information about FPGA and CPLD board
  3. R

    hspice - vth value for transistors

    you can change your model file. Different model file have different Vth value so change ur model file
  4. R

    How to create a sine wave with verilog ?

    // sine wave generation library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; use work.sine_package.all; entity sine_wave is port( clock, reset, enable: in std_logic; wave_out: out sine_vector_type); end; architecture arch1 of sine_wave is type state_type is (...
  5. R

    Looking for information about HC11

    Re: HC11 did u design or not? if yes then send me design document
  6. R

    industrial ethernet ip core specification

    ETHERNET/IP i need industrial ethernet ip core specification i need also design specification of this
  7. R

    modify ethernet mac ip core to industrial ip core

    need industrial ethernet 10/100 ip core specification. plese give me any details abouts this....
  8. R

    Industrial Ethernet mac (10/100) IP core

    can any one help me...? i want to modify the ethernet ip core to industrial ip core. so can any one give me detail about industrial ip core and its specification...?
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