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I have run a VCO simulation by spectre. The VCO is a differential inverter with a pair cross-couple PMOS. Output frequency is about 1GHz when input vctl equals 705mV.
The problem is shown in attachment.
curve1:vctl=706mV，out=998MHz
curve2:vctl=710mV，out=985MHz
curve3:vctl=704mV，out=1.004GHz...
I'm designing a circuit driving 4K pixels with chrt35 process. So the size of the array is about 7mm * 7mm . And I use a common voltage to bias every amplifiers in pixels.
But I have no idea about the variation in threshold voltage(Vth) across the die. Is the mismatch of these devices serious?
charge scaled dac
hi,
i'm reading the book cmos analog circuit design by Allen and i have a question about the charge scaling dac.
if the switch S1 is closed, the voltage of C1 is Vref and the voltage of C2 is zero, and i think it will not change whether S1 is open or not. So Vout is zero...
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