Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Dear:
The pfd output should be checked first. IF the pfd work correctly, the vtune should be raise. Because u say that ur vtune is always zero after power on.
Hello All:
If the metal filling is connect to ground, as the result, it will raise the capacitance between ground and critical node, ex: high bandwidth circuit, filter, etc..... .
It will produce a difference between presim and postsim. Unless, the metal filling paracitic capacitance...
Re: Resistor Problem !
Dear:
the 40k ohm will occupy large area. As the result, the area of the active device will be samller than the area of the resistors. Why don't u think about the mos resistor to reduce ur area.
Dear All:
I am meauring the ac response of the VGA (BW~200MHz). The VGA is differetial in and differetial out. How can I measure the VGA by network analyzer which is sigle-end in and single-end out.
BR. purefen
Re: On postlayout simulation
regarding (1):
the postsim can help u find out the parastic capacitance which u maybe not consider when u are in design phase. For high frequency application, it bring u some surprise. For example: oscillation frequency drift; overdamping on ac response that boost...
Re: oscillation
Dear:
I think that it should not be oscillation. Because as u apply input to ur amp, the unwanted signal will appear. But as u remove the signal source, the unwanted signal vanish. For "oscillation", even remove the signal source, the unwanted signal will still exsit.
U...
site:www.edaboard.com process variation
Dears:
u should find out the process data sheet which is provided by ur Foundry.
It will give u this information clear and detail. If u don't do this, u will design a chip which is not suit for mass production.
For my company, circuit designer only do designing and monitor the layout.
Our layout enginers are very expert in layout. We can talk each other about the layout and decide the best way to be layout. As the result, we can get fast and better products.
Dears:
I am designing a VGA which is for mass produced. And its spec. is listed below.
1. wideband ( >200MHz),
2. high dynamic input rang ( Vin,max=80mv~800mv),
3. high linearity ( THD>50dB),
4. continuous control volatge for VGA,
5. power ( <15mA)
6. linear dB gain.
I have study...
Dear Sirs:
I have designed the frequency synthesizer before. But, this is my fist time designing CDR. Which text book is suitable for designing CDR. Thanks a lot.
BR. purefen
Re: how many corner cases to sure the circuit being mass pro
Dears:
Thanks for your replies. Read all the replies of your, I thinsk that Humungus's suggestion is more realitic and logical. The more corner is, the more tired the designer is. As the result, I will try to find out the flow...
snsp corner
Dears:
Although a designer should know which corner case will degrade the performance of your designed circuit. But it is maybe the worst case which is out of 3-sgma ramge. If trying to overcome the worst case, the area and power of the circuit will raise. Will you do that? How...
Dear:
The speed and the gain of the comparator is the imporatnt issues.
U should find out the spped and the gain of the comparator used in your sub-system.
The first stage of the comparator should used mini Cgs to reduce the kick-back noise. And the output of the dc operating point...
Re: pll design
U can analyze the jitter by the phase noise. The ADS and SpectrRF can hlpe you fininshing these things. It can provide you the lower bound of the jitter of ur circuit, because it olny calculate the device noise not including other noise which from power, reference and substrate...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
