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Thank you nitishn5, I've found your replies very useful.
By "without VSS", meaning that VSS is ground.
The project specs says that only one DC source can be used, and it is VDD. Which got me confused on how to bias the input (we can't use DC voltage at the gate).
I've figured with the help with...
Thank you for suggesting Razavi, it has been very helpful :)
However, maybe it's a stupid question, but i can't seem to solve this problem :
Every amplifier I've seen using NMOS differential input. We are allowed to use only a single DC supply, VDD = 2V.
How can I bias the NMOS without VSS? If...
By long-tail, do you mean these schematics?
I am thinking connection active load PMOS, and biasing them for my desired voltage.
Also, connecting the output (Vout+/Vout-) to a current sink below M1,M2
something like this :
But how can I be sure that I could even get the specs I need? Should...
Hey,
We've given a task to design a fully differential amplifier using cadence virtuoso.
We are allowed to use only a single DC supply VDD, and given the following required specs:
You must design this amp including a CMFB, all bias circuits and bias reference circuits. You have complete...
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