Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by potatoe

  1. P

    The effects of connecting 10V battery to a 5V capacitor

    Re: about capacitor In this circuit capacitor can endure voltage 5 volts but source can supply 10 volts.In this case ,What's happen on capacitor.
  2. P

    The effects of connecting 10V battery to a 5V capacitor

    If battery have 10 volts and capacitor can charge about 5 volts is maximum as show in picture below . When switched is on,how many Imax and how about capacitor. [/img]
  3. P

    about SN74HC00N(TTL NAND)

    Oh, I don't know before I think all 74xx are TTL gate. What's the No. of TTL NAND in 74XX series . Thanks.
  4. P

    about SN74HC00N(TTL NAND)

    I wanted to know why SN74HC00N(TTL) acts like CMOS 4011.It's no Zin=infinity(no input current).If possible i wish to see internal structure of SN74HC00N. Thanks. James
  5. P

    help me please(circuit analysis)

    If the NAND gate is TTL and input voltage higher than 5V it can't work properly and the gate will take damaged ? I would be appreciate you to help me. potatoe.
  6. P

    help me please(circuit analysis)

    To AudioGuRu 1.The characteristic of CMOS NAND gate will similar with CMOS inverter? 2.In regularly TTL have supply voltage 5volts .Could the input voltage of 12 volts affect with the TTL gate?
  7. P

    help me please(circuit analysis)

    1.When input is high,why output is half to supply voltage ? can you make me clearly,please? 2.If NAND is TTL gate the output should be? Thanks.
  8. P

    help me please(circuit analysis)

    if the CMOS gate not oscillate,how is its result should be? Thanks.
  9. P

    help me please(circuit analysis)

    Thank you for all suggestion. To Audioguru ,I wanted to know if the NAND of this circuit(my circuit) is TTL gate ,what is happened?and if the NAND is CMOS gate(not schmitt trigger),wht is happened?
  10. P

    help me please(circuit analysis)

    point of Vo is output of NAND ,it connected to the feedback system.
  11. P

    help me please(circuit analysis)

    dear, DrBob13 if the pull up voltage is 12V and gate is NAND not schmitt according the picture .what's the Vo should be? help me please. Thanks.
  12. P

    help me please(circuit analysis)

    1. to AdvaRes Vo mean "Voltage output". 2.to all ,sorry from my mistake that show in this picture ,actually logic gate must be NAND not AND .New picture shown below. [img]https://www.temppic.com/img.php?16-06-2008:1213613729_0.03144400.jpg Added after 34 seconds: picture
  13. P

    help me please(circuit analysis)

    how many Vo of this circuit ? when switch open and closed for initial Vo =0 Volts.help explain the step for get come to which the answer of this circuit,please.

Part and Inventory Search

Back
Top