Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Re: CMFB stability
This article/post might be useful:
https://www.circuitdesign.info/blog/2008/10/a-compact-common-mode-feedback-loop-using-a-pmos-triode-device-for-cmfb/
This might be helpful, but a bit advanced: https://www.circuitdesign.info/blog/2008/10/a-compact-common-mode-feedback-loop-using-a-pmos-triode-device-for-cmfb/
If you need further help, just post a comment there.
Re: How can I deal with 3rd HD in a 2nd SigmaDelta Modulator
Agreed. That's my point. The figure that the OP posted indicates to me that (s)he doesn't have enough gain in the loop at 24 kHz. You can see the quantization noise rising well before 24 kHz. If (s)he wants things clean out to 24 kHz...
Re: How can I deal with 3rd HD in a 2nd SigmaDelta Modulator
hannerfherder:
I wouldn't say that a 1-bit quantizer is inherently linear. I'd say that a 1-bit DAC is inherently linear. (And even that's tricky.) For example, if I put a sinusoid into a 1-bit quantizer, I am going to see...
R2 has no effect if you are driving the circuit differentially and looking at the differential output. I presumed this was the case, since you have a tail current source that greatly suppresses any common-mode gain.
The common-mode bandwidth is
1/(2*pi*(R1+R2/2)*2*Co)
unipolar to bipolar conversion
I assume you have 0-3V signal as fully differential square waves. If not, add an inverter (on the 0 - 3V supply) to make the inverse of the square wave.
Take the 0-3V signals (Vi1 & Vi2) and put them into gates of two 11-V tolerant PMOS devices (source tied to 3...
The nodes Vout have some capacitance. Let's call the total capacitance on each side (mostly due the the drain capacitance of the MOSFET's plus any load capacitance not shown in your circuit) as Co.
The 3-dB bandwidth is 1/(2*pi*R1*Co).
cadence snr
Here's how I do it:
https://www.circuitdesign.info/2008/09/calculation-of-adc-snr-in-cadence-skillocean/
P.S. I also dump to Matlab for an FFT. However, I do compute the SNR/SNDR using Cadence Ocean/Skill.
matlab adc
Sorry: I misunderstood your question. I thought you meant sigma-delta (for some reason), but I realize now you really had said integrating ADC.
So, in this case, you are integrating the input. You compare the result of the integration to a reference value. When the result trips the...
adc simulation in cadence
You are doing a transient noise simulation?
Transient noise simulates circuit noise (thermal, flicker, etc). The sigma-delta will shape any noise that is injected after the integration (most notably, your quantization noise). Much of your circuit noise occurs before...
Re: How can I deal with 3rd HD in a 2nd SigmaDelta Modulator
It’s possible that the OTA is limiting you. Doing a matlab model of the sigma-delta and running it should tell you whether it is a circuit problem or a system-level problem. My hunch is that it’s a system-level problem: the...
Your layout will work. It will cancel out linear gradients. However, if you iterate on the layout, you can cancel higher-order gradients (square or cube).
Can you make them 8 fingers instead of 10? If so, I would do:
A B B A
B A A B
B A A B
A B B A
You'll want to put dummies around the...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
